This invention relates to optical encoders and other sensing devices and, more particularly, to interpolation methods and circuits for increasing the resolution of optical encoders and other sensing devices.
Conventional optical encoders translate the rotary motion of a shaft into a digital output. Shaft position can be determined from the digital output. A prior art optical encoder, as shown in FIG. 1, includes an emitter 10, a detector 12 and a code wheel 16 positioned between emitter 10 and detector 12. Emitter 10 includes a light emitting diode (LED) 20 and a lens 22 which collimates the light emitted by LED 20 into a parallel light beam 24. Detector 12 includes multiple sets of photodiodes 26 and signal processing circuitry 30 for processing the outputs of photodiodes 26.
Code wheel 16, which has a pattern of transparent spaces 32 and opaque bars 34, rotates between emitter 10 and detector 12. The light beam 24 is interrupted by the pattern of spaces and bars on the code wheel 16. The photodiodes 26 which detect these interruptions are arranged in a pattern that corresponds to the radius and design of the code wheel 16. The photodiodes 26 are also spaced such that a light period on one pair of detectors corresponds to a dark period on an adjacent pair of detectors.
The photodiode outputs are fed through signal processing circuitry 30, resulting in A, Axe2x80x2, B and Bxe2x80x2 ramp signals, as shown in FIG. 2. The A ramp signal and the B ramp signal are 90 degrees out of phase. The Axe2x80x2 ramp signal is 180xc2x0 out of phase with the A ramp signal, and the Bxe2x80x2 ramp signal is 180xc2x0 out of phase with the B ramp signal. A comparator 40 receives the A and Axe2x80x2 ramp signals and produces a channel A output signal as shown in FIG. 2. A comparator 42 receives the B and Bxe2x80x2 ramp signals and produces a channel B output signal as shown in FIG. 2. Index processing circuitry 44 receives inputs from comparators 40 and 42 and a comparator 46, and generates a channel I index pulse. The index pulse provides a reference for the channel A and channel B output signals.
The channel A and channel B output signals are in quadrature, i.e., 90 degrees out of phase. This arrangement produces four states for each code wheel cycle of one space 32 and one bar 34. Detector 12 thus provides a resolution of four states per cycle of the ramp signals.
In some applications, higher resolution is required. One known approach is to digitize the A, Axe2x80x2 B and Bxe2x80x2 ramp signals with an analog-to-digital converter and to process the digitized ramp signals with a digital signal processor. However, this approach is relatively complex and expensive.
Optical encoders are disclosed in U.S. Pat. Nos. 4,691,101 issued Sep. 1, 1987 to Leonard; U.S. Pat. No. 4,904,861 issued Feb. 27, 1990 to Epstein et al; and U.S. Pat. No. 5,844,814 issued Dec. 1, 1998 to Chliwnyj et al. An interpolation circuit for an encoder is disclosed in U.S. Pat. No. 5,907,298 issued May 25, 1999 to Kiriyama et al. However, the known prior art does not disclose interpolation circuits and methods which provide high resolution and which are relatively simple and inexpensive.
Accordingly, it is desirable to provide interpolation methods and circuits for optical encoders and other sensing devices, which provide high resolution and which are relatively simple and inexpensive.
According to a first aspect of the invention, an interpolation circuit is provided. The interpolation circuit comprises a signal generating circuit, a comparator circuit and a logic circuit. The signal generating circuit generates A, Axe2x80x2, B, Bxe2x80x2, one or more fractional A or Axe2x80x2 and one or more fractional B or Bxe2x80x2 ramp signals in response to input ramp signals that are one quarter cycle out of phase. The comparator circuit compares selected pairs of the A, Axe2x80x2, B, Bxe2x80x2, one or more fractional A or Axe2x80x2 and one or more fractional B or Bxe2x80x2 ramp signals and generates intermediate signals. The phases of the intermediate signals are preferably uniformly or nearly uniformly distributed with respect to the ramp signals. The logic circuit combines the intermediate signals and provides first and second output signals, each having multiple cycles per cycle of the ramp signals. The first and second output signals are shifted in phase relative to each other.
In one embodiment, the signal generating circuit generates A, Axe2x80x2, B, Bxe2x80x2, A/3 or Axe2x80x2/3 and B/3 or Bxe2x80x2/3 ramp signals. The comparator circuit generates eight intermediate signals that are uniformly distributed in phase. The logic circuit provides first and second output signals having a total of 16 states, thereby providing a resolution of 16 states for each cycle of the ramp signals.
According to another aspect of the invention, a method is provided for interpolating input ramp signals that are one quarter cycle out of phase. The method comprises the steps of generating A, Axe2x80x2, B, Bxe2x80x2, one or more fractional A or Axe2x80x2 and one or more fractional B or Bxe2x80x2 ramp signals in response to the input ramp signals, comparing selected pairs of the A, Axe2x80x2, B, Bxe2x80x2, one or more fractional A or Axe2x80x2 and one or more fractional B or Bxe2x80x2 ramp signals and generating intermediate signals, and logically combining the intermediate signals to provide first and second output signals, each having multiple cycles per cycle of the ramp signals. The first and second output signals are shifted in phase relative to each other.
The interpolation circuits and methods of the invention may be utilized in an optical encoder comprising a light source for directing a light beam at a moving code wheel to produce a modulated light beam and a photosensor assembly for receiving the modulated light beam and generating photosensor signals. The light beam may be transmitted through the code wheel to the photosensor assembly or may be reflected by the code wheel to the photosensor assembly. The interpolation circuits and methods may be utilized with any sensor that produces ramp signals that are 90 degrees out of phase.